1. Technical Field
The present disclosure relates to semiconductor devices, and particularly to a compound semiconductor device including a protection element.
2. Description of the Related Art
A compound semiconductor, in particular, a nitride semiconductor, is a semiconductor including a compound composed of boron (B), indium (In), aluminum (Al), or gallium (Ga), which is a group-III element, and nitrogen (N), which is a group-V element, and expressed by the chemical formula BwInxAlyGazN where w+x+y+z=1, 0≦w,x,y,z≦1.
The nitride semiconductor has advantages such as a high breakdown voltage, high electron saturation velocity, high electron mobility, and a high electron concentration at a heterojunction. A field-effect transistor (FET) using a nitride semiconductor shows promise as a power device that operates with high power and thus requires a high voltage tolerance.
The FET using a nitride semiconductor has a high voltage tolerance and low ON-resistance and therefore is capable of significantly reducing the element size of the FET, compared with an FET using a Si-based semiconductor in which a withstand voltage and ON-resistance during operation are set to be equal.
As the element size is reduced, however, the risk of breakage due to the surge voltage applied between electrodes increases. Common examples of the FET using a nitride semiconductor are two types of field-effect transistors, a metal-semiconductor field-effect transistor (MESFET) and a junction field-effect transistor (JFET). The MESFET and the JFET both have a high tolerance for the surge voltage for applying a positive bias to the gate electrode and have a low tolerance for the surge voltage for applying a negative bias to the gate electrode. Therefore, when the FET using a nitride semiconductor is used as a power switching element or the like, the tolerance for the negative surge voltage applied to the gate electrode is required to improve.
Adding a transistor for protection from surges has been proposed in Japanese Unexamined Patent Application Publication No. 2011-165749 (PTL 1) as a method of improving the tolerance for a negative surge voltage on the gate electrode of the FET using a nitride semiconductor.